The structure of the Projected Capacitive Touch Screen Panel is mainly to plate a transparent film body layer on the glass screen. Then add a piece of protective glass outside the conductor layer. The double glass design can completely protect the conductor layer and the sensor. In addition, the light transmittance is higher. The base steel plate of the capacitive touch screen is a single-layer plexiglass. A layer of transparent conductive film is uniformly forged on the inner and outer surfaces of the plexiglass. Each of the four corners of the transparent conductive film on the outer surface has a long and narrow electrical level.
We can simply regard the capacitive touch screen as a screen composed of four-layer composite screens. The outermost layer is the glass protective layer. Then comes the conductive layer. The third layer is not a conductive glass screen. The fourth innermost layer is also a conductive layer. The innermost conductive layer is the shielding layer. It has the function of shielding the internal electrical signals. What’s more ,the conductive layer in the middle is the core part of all touch screens. There are immediate wires at the four corners or next to the four. Undertake the inspection of the touch point.
The uppermost covering layer is tempered glass or polyethylene terephthalate (PET). The advantages of PET depend on the fact that the touch screen can be thinner. On the other hand, it is more cost-effective than the current plastic and FRP materials. The cable sheath is made of glass (0.4～mm), organic chemical film (10～100um), adhesive, and air. The most important layer is the indium tin oxide (ITO) layer. The typical thickness of ITO is 50-100nm, and its sheet resistance is in the range of 100-300 ohms.
The three-dimensional structure of the ITO processing technology is very harmful to the capacitive sensor touch screen. However, it is immediately associated with the main parameters of the two core capacitors of the touch screen. Magnetic induction capacitor (finger tip and top ITO) and parasitic capacitance (between the upper and lower layer of ITO, and between the next layer of ITO and the display information screen).
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